FIG. 1 is an illustration of a wafer 10 such as ones which may be used in the fabrication of integrated circuits and other microdevices. While the term wafer may be used to refer only to the substrate material on which the integrated circuit is fabricated (e.g. a thin slice of semiconductor material, such as a silicon crystal), this term may also be used to refer to the entire construction, including the electronic circuit fabricated on the wafer. The wafer 10 is divided into multiple dies 11 which are illustrated in a widely implemented rectangular form. Like the term ‘wafer’, the term ‘die’ may also be used either for small blocks of semiconducting material, on which a given functional circuit is fabricated, or for such a block including the fabricated electric circuit.
Usually, wafer 10 may be cut (“diced”) into its multiple dies 11, wherein all of the dies of the wafer contain a copy of the same electronic circuit. While not necessarily so, each of the dies 11 is independently functional.
U.S. Pat. No. 7,847,929 which is entitled “Methods and Apparatus for Inspecting a Plurality of Dies” discloses a method for inspecting a plurality of dies, that are typically disposed on a surface of a semiconducting wafer. Each of the dies includes respective functional features within the die. The method consists of identifying within a first die a first multiplicity of the functional features having respective characteristics, and measuring respective first locations of the first multiplicity with respect to an origin of the first die. Within a group of second dies a second multiplicity of the functional features having the respective characteristics is identified, respective second locations of the second multiplicity are measured. The second locations are compared to the first locations to determine a location of an origin of the group of the second dies.